Descripción

Join the vibrant Global CAD team pushing the limits of design solutions for the chips powering billions of mobile devices.  The position requires Python or C++ coding experience and CAD development skills to define and develop tools and methodologies for various design flows, in close collaboration with Physical Design and Timing/PDN teams and CAD domain experts. Using leading edge internal and EDA technologies, including pioneering in genAI/ML, and developing good-by-construction tools for chip RTL integration and floorplanning.

This role’s responsibilities will include:

• • Develop and maintain internal software products in the domain of top-level chip floorplanning RTL modules placement and datapath pipeline routing for optimal timing and area.
  • Develop new features in existing internal software tools, including webapp GUI development, design collaterals parsers, high-level APIs.
  • Develop and augment design flow infrastructure software tools, for instance to automate design regression or extract standalone design testcases from production execution area for regression purpose.
  • Apply best coding practice, in terms of class definition, linting, adherence to the CI/CD pipeline, documentation.
  • Participate to the Project Specs development through meetings with key chips designers and CAD project leads, about the scope and the required features.
  • Participate to the Software Specs development along with software leads, including creating UML diagrams showing the intended software architecture.
  • Interfacing with Global CAD software developers and VLSI domain experts.

Preferred Qualifications:

•    Masters degree or PhD in Computer Science, Compute Engineering, or related field.

•    1-4 years of experience in software development in Python, Javascript or C++. Python preferred.

•    Experience in software development platforms, such as git, gitlab or github.