The Package Electrical Team has an opening in the areas of signal integrity and power integrity.  The candidate will work with package and IC designers to find ways to optimize the overall package design. The candidate’s responsibility is working with substrate designers to make sure all system level constraints are met prior to the package Tape-out.  The candidate is expected to communicate with PHY owners to understand the Specs for various IPs such as PCIe, UFS, USB, MIPI, LPDDR, etc, and also with PCB designers to assess the impact of Ball assignment to the system level performance.  This position offers the opportunity to work across multiple organizations such as PHY team, PCB team and PSIG and providing timely feedback and updating design guideline to the team is essential.

The responsibilities will include but not be limited to the following:

• Perform package extraction for the time domain and frequency domain analysis
• Perform system-level analysis for DDR, SerDes & Mixed signal interfaces
• Provide design guidelines for the Package design
• Develop design & analysis flow and automate the process
• Create technical documentation and presentations

Minimum Qualifications:

• 3+ years of experience in DDR/SerDes in Package/PCB/System Design related to mobile standards
• Experience in Electromagnetics and solid background on transmission line theory & Crosstalk
• Proficiency in field solvers such as HFSS, Q3D and Sentinel-PSI
• Experience in simulation tools such as ADS and Hspice
• Working knowledge in Cadence Allegro/APD/Sip or Mentor Xpedition

Preferred Qualifications: 

• Experience in programming language(c/c++) or scripting language(Perl/Python) is a plus
• Experience in Matlab to be able to automate existing simulation flow
• Experience in design specifications such as LPDDRx, MIPI(CSI, DSI), PCIe , UFS
• Master Degree with 3 ~ 4 years of experiences is preferred, Ph.D with minimal experience is considered as well