Descripción
Validation team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The validation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidate specifically for SOC Infrastructure, NoC and Performance validation in pre-silicon emulation and post-silicon system validation.
The candidate is expected to have an excellent understanding of digital design fundamentals, on-chip interconnects, writing content to validate and analyze SOC bus architecture and performance.
Required Skills:
- SOC Bandwidth, QoS, Latency and Throughput analysis
- Interconnect architectures - NoCs, AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverage
- Solid expertise in various FIFO designs and related performance/functionality aspects
- Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored in
- Low power modes
- Dynamic clock and voltage scaling operations
- Interrupt architecture
- Debug architecture - interactions with JTAG based debuggers, state dump scripts
- Performance monitor architecture
- Thorough understanding of CPU and DDR concepts, Multimedia, GPU, Peripheral,
- Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM
- Experience in embedded systems/expertise in C, C++, Python and assembly languages
- Design and Implementation of drivers and test content
- Debugging low level software and hardware issues
- Familiarity in debug tools including JTAG and kernel debuggers
- Structured program development concepts
- Understanding of performance metrics, testing methodologies
- Design and implement performance validation tests for new and existing products.
- Analyze and interpret test results and provide detailed reports on performance metrics.
- Collaborate with cross-functional teams to identify and resolve performance issues.
- Develop and maintain performance testing tools and frameworks.
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, or related work experience.
OR
PhD in Science, Engineering, or related field and 3+ years of ASIC design, verification, or related work experience.