Posición: Tech IP Library Characterization Engineer
Tipo de empleo: Permanent
Tipo jornada: Full-time
Localización: Tijuana, Baja California
Fecha de publicación: 15-05-2026
Identificador oferta: 59131

Descripción

This position is to work with a global leader company in the design and development of advanced semiconductors, responsible for architectures and platforms that form the core of some of the most innovative devices on the market. Its silicon engineering drives solutions that deliver high performance, energy efficiency, and intelligent integration, complemented by a key role in advancing modern telecommunications through next-generation wireless connectivity technologies. Its solutions are integrated into billions of devices worldwide, offering an ideal professional environment for talent seeking technological impact, innovation, and growth within a global context.

We are looking for talented and ambitious individuals to join the TECHIP team. The candidate should have strong IP modeling, Char tool know-how and hands-on experience and automation skills. Hands-on experience in EDA tool automation, data analysis and visualization & large-scale software automation enablement. Excellent understanding of statistical Liberty timing, power model and Front-end Verilog views and tools. Silicon reliability modeling, validation with multiple foundries & EDA house is a plus.

Minimum Qualifications

  • Bachelor’s in Electrical Engineering, Computer Engineering, or Computer Science
  • 0–3 years in library characterization, custom circuit design, CAD flow development, or VLSI-related roles.
  • Strong knowledge of standard cell and memory circuits, IP characterization, and Design Kit delivery.
  • Solid problem-solving, analytical, and debugging skills.
  • Programming skills in Python or Perl on UNIX/Linux platforms.
  • Strong communication, teamwork, and motivation.
  • Ability to collaborate across multi-site teams and third-party vendors to develop characterization flows and sign-off methodologies.

Preferred Qualifications

  • Master’s in Electrical Engineering, Computer Engineering, or Computer Science
  • Deep understanding of CMOS, FinFET, transistors, and digital circuit optimization.
  • Experience with Design Kits (DK), Liberty formats (CCS, LVF), and statistical variation models.
  • Familiarity with front-end design flow: RTL (Verilog/SystemVerilog), verification, SVA, DFT, BIST.
  • Advanced scripting skills (Python, Perl) and experience building large-scale automation frameworks.
  • Knowledge of STA, physical design, SPICE simulations, and DRC/LVS/ERC (plus).
  • Exposure to industry tools and flows for STA, synthesis, DFT, and power analysis.

Location: Santa Fé, Tijuana

Tipo de ficheros (doc, docx, pdf, rtf) tamaño hasta 10MB